Multicore Hardware-Software Design and Verification Techniques

Author(s): Chao-Sheng Lin, Pao-Ann Hsiung, Chih-Hung Chang, Nien-Lin Hsueh, Chorng-Shiuh Koong, Chih-Hsiong Shih, Chao-Tung Yang and William C.-C. Chu

DOI: 10.2174/978160805225711101010061

Model-Driven Multi-core Embedded Software Design

Pp: 61-77 (17)

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Multicore Hardware-Software Design and Verification Techniques

Model-Driven Multi-core Embedded Software Design

Author(s): Chao-Sheng Lin, Pao-Ann Hsiung, Chih-Hung Chang, Nien-Lin Hsueh, Chorng-Shiuh Koong, Chih-Hsiong Shih, Chao-Tung Yang and William C.-C. Chu

Pp: 61-77 (17)

DOI: 10.2174/978160805225711101010061

* (Excluding Mailing and Handling)

Abstract

Multi-core processors have emerged rapidly in personal computing and embedded systems. However, the programming environment for multi-core processor based systems is still quite immature and lacks efficient tools. In this work, we present a new VERTAF/Multi-Core framework and show how software code can be automatically generated from SysML models of multi-core embedded systems. We illustrate how model-driven design based on SysML can be seamlessly integrated with Intel’s threading building blocks (TBB) and the Quantum Platform middleware libraries. We use a digital video recording system to illustrate the benefits of the framework. Our experiments show how the combination of SysML, QP, and TBB help in making the multi-core embedded system programming model-driven, easy, efficient, and effortless.

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