Multicore Hardware-Software Design and Verification Techniques

Author(s): Fadi N. Sibai

DOI: 10.2174/978160805225711101010003

Affinity and Distance-Aware Thread Scheduling and Migration in Reconfigurable Many-Core Architectures

Pp: 3-18 (16)

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Abstract

SHS investigation development is considered from the geographical and historical viewpoint. 3 stages are described. Within Stage 1 the work was carried out in the Department of the Institute of Chemical Physics in Chernogolovka where the scientific discovery had been made. At Stage 2 the interest to SHS arose in different cities and towns of the former USSR. Within Stage 3 SHS entered the international scene. Now SHS processes and products are being studied in more than 50 countries.

Abstract

Modern many-core CMPs and MPSoC embedded systems integrate different cores. A 2D mesh interconnects the routers at each core providing system reconfigurability which for instance allows the bypassing of specific routes due to faults or congestion. In this work, a class-based many-core architecture with reconfigurable classes and a 2D Mesh-based on-chip interconnection network is considered. We present an affinity- and distanceaware thread scheduling scheme and migration policies for a reconfigurable heterogeneous class-based 2D Meshinterconnected many-core CMP. We also present a simulator for evaluating various scheduling and migration algorithms. The simulation results reveal that scheduling algorithms which both consider core affinity and support distance-based migration outperform the other considered algorithms in reconfigurable many-core architectures.

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