Abstract
Introduction: Transistors are the fundamental electronic component integrated into electronic
devices' chips Carbon Nano Tube (CNT) based field.
Methods: Effect Transistor (FET) is a promising component for next-generation transistor technologies;
as it has high carrier mobility, device stability, and mechanical flexibility. Nevertheless, some shortcomings
in the CNT FET's design prevent it from providing the best performance while preserving
thermal stability.
Results: The structure and functionality of transistors with Double-Gate (DG) devices, which use carbon
nanotubes as active channel regions, have been examined by the authors of this study. The DG
CNT FET has been extensively simulated using an electronic device simulator with various device geometrics,
including channel length, oxide thickness for its output, and transfer characteristics. In comparison
to reported patents and published works, this demonstrates a significant improvement.
Conclusion: A new perspective on the DG CNT FET's device performance characteristics is provided
by this research work, which can be scaled down to minimum channel length without Short Channel Effects
(SCEs).
Keywords:
Carbon, carbon nanotube, nano transistors, flexible electronics, nanotechnology, nanomaterial.
Graphical Abstract
[1]
Viranjay M. MOSFET Technologies for Double-Pole Four-Throw Radio-Frequency Switch (Analog Circuits and Signal Processing Book 122). 2014th ed. Springer New York 2013.
[2]
Sedra AS, Smith KC. Microelectronic Circuits. (International Sixth Edition.), Oxford University Press 2011.
[5]
Roy K, Prasad S. Low-power CMOS VLSI circuit design. Wiley 2000.
[6]
Haron NZ, Hamdioui S. Why is CMOS scaling coming to an END? 2008 3rd International Design and Test Workshop . 20-22 December 2008; Monastir, Tunisia 2009.
[12]
Boukortt NEI, Trupti RL, Salvatore P. Effects of varying the fin width, fin height, gate dielectric material, and gate length on the DC and RF performance of a 14-nm SOI FinFET structure. Electronics 2022; 11(91): 17.
[15]
Pucknell DA, Eshraghian K. Basic VLSI Design. (3rd ed.). Prentice Hall India Learning Private Limited 1995; p. 595.
[21]
Zeitzoff PM, Huff HR. MOSFET scaling trends, challenges, and key associated metrology issues through the end of the roadmap. AIP Conference Proceedings Am Ins Phy. 2005; 788: pp. (1)203-13.
[32]
Moorthy VM, Joseph Daniel R, Shanmugaraja P. Modelling, simulation and analysis of nano photo diode arrays using cnt’s and graphene nano materials for sub-retinal implant. IOP Conf Ser Mater Sci Eng 2021; 1225(012010): 1-13.
[36]
Chopade SS, Mane S, Padole D. Design of DG-CNFET for reduction of short channel effect over DG MOSFET at 20 nm. 2013 IEEE International Conference of IEEE Region 10 (TENCON 2013). 22-25 October 2013; Xi'an, China. 2013.
[47]
Pesetski AA, Zhang H, Adam JD, et al. Carbon nanotube field effect transistor Patent EP2038933A2, 2009.
[48]
Bertin C, Meinhold M, Konsek S, Rueckes T, Guo F. Hybrid carbon nanotube FET(CNFET)-FET static RAM (SRAM) and method of making same Patent US20060237857A1, 2009.